a techfocus media publication :: April 8, 2008 :: volume XI, no. 02

FROM THE EDITOR

This week, Bryon Moyer looks at the Javafication of real-time and safety-critical applications.  Aonix has been working to produce a Java that’s usable in the more demanding world in which many embedded developers often exist.  Although languages like Java have some inherent advantages in avoiding problems down the road, there are substantial challenges to overcome producing a standard for a safety-critical version.

Thanks for reading! If there's anything we can do to make our publications more useful to you, please let us know at: comments@embeddedtechjournal.com. If you'd rather sound off in public, please post your comments or questions in our new Journal Forums.

Kevin Morris – Editor-in-Chief
Techfocus Media, Inc.

EVENTS and ANNOUNCEMENTS

The Analog Devices Digital Video Surveillance Kit, engineered by Avnet, provides a simplified prototype development platform for networked intelligent video surveillance applications. The kit is provided complete with either a wide-VGA or 2 Megapixel image sensor headboard, a 500 MHz dual core Blackfin processor board
with both USB and Ethernet interfaces.
Click here for more info

Powering FPGA-Based Systems … Simply
DC/DC µModuleTM regulators are complete system-in-package power supplies, ready to power your FPGA-based systems. These powerful DC/DC circuits include the inductor and MOSFETs and are simplified to resemble an IC. From low to high power, these DC/DC µModule systems are backed by Linear Technology’s rigorous testing.
Click here for more

High Efficiency Power Supply Design for FPGA-Based Systems. Performance of FPGA-based systems depends on the electrical and thermal performance of DC/DC regulators. A properly packaged power management device improves regulation accuracy and stability while removing heat quickly. DC/DC µModuleTM regulators from Linear Technology are complete system-in-package power supplies in an IC form-factor with optimum layout and very low thermal impedance.
Click here for more

Xilinx Virtex(r) -5 FPGA Development kit for PCIe(r)
Cut design time, power and cost with built-in PCIe block.
Get started now with this PCI-SIG compliant solution from Xilinx.
Buy kit

Mixed-Signal ASICs from ChipX

  1. USB 2.0 & PCI Express ASIC Designs and FPGA conversion
  2. USB-IF & PCI-SIG certified ASICs
  3. Standard Cell, Hybrid ASIC and Structured ASIC solutions
  4. Low NRE, fast Time to Market, USB & PCIe ASIC platforms

Win a PCIe Development Board click here

Understanding the cost and time restraints of the industry, PDI provides the perfect low maintenance out source solution for the production and shipping of your training manuals globally.  Through on-line ordering, version control, global coverage with localized production, efficiencies will be gained and costs controlled.
Find out more at www.pdi-europe.com

NEW!! IC Journal - Do you love Embedded Tech Journal? We're happy to announce our new IC Design and Verification Journal.  It'll be just like Embedded Tech Journal except, you know, about ASICs and stuff. 
Subscribe today for free.

LATEST NEWS

April 8, 2008

4.3-inch color display module provides ease-of-use and competitive pricing

embOS supports ARM VFP and other CPU extensions

Cymbet Showcasing Permanent Power Solutions Using EnerChip™ Thin-Film Batteries at ESC 2008 Conference

Timesys Announces Embedded Linux Support for Freescale MPC8572 Processors

Teridian Announces General Sample Availability of 78Q8430 10/100 Fast Ethernet Multi-Media Offload Controller for Embedded Applications

Micrium Completes First Ports to Analog Devices’ Blackfin Processors

New X-FAB 0.18 Micrometer Process Maximizes Cost-Effectiveness in Analog/Mixed-Signal Chip Design for Commercial Automotive and Power Management Applications

April 7, 2008

Young robot designers innovate with Altium’s support

NEC LCD Technologies Announces New 10.4-inch LCD Module With Superior Viewing Performance

Micro Digital, Inc. to Showcase USB and WiFi at Embedded Systems Conference in San Jose

Aonix PERC® Pico Provides Support for Wind River VxWorks

Microsoft Research Celebrates the Past, Present and Future of Human-Computer Interaction at CHI 2008 Conference

Mellanox Announces Industry’s First Integrated Fiber Channel over Ethernet Adapter with Hardware Offload

April 3, 2008

Altium expands versatility of Altium Innovation Station

Novelics Announces Availability of Single-Transistor SRAM for 65-Nanometer System-on-Chip Design

NEC Electronics Europe introduces small package line up for PowerMOSFETs targeting mobile device applications

Small Form Factor SIG Adopts VIA’s Pico-ITX Specification

April 2, 2008

FST To Showcase Advanced GUI and High Performance Multimedia Platform at ESC

congatec AG Announces COM Express™ Compact Module Based on Intel® Atom™ Processor Z500 Series

VMETRO Expands Buffer Memory Products to Include XMC Modules

Toshiba begins mass production of MLC NAND Solid State Drives

InHand Electronics Announces Development of Small-Form Factor Embedded System Based on New Intel Low Power Platform

CURRENT FEATURE ARTICLES

Java Earning Its Wings
Aonix Makes Real Time Almost Safety Critical

(Bryon Moyer)
MIPS Moves on Multi-Core
MIPS32 1004K (Kevin Morris)
As Easy As Pie
(Bryon Moyer)

Embedded World
(Dick Selwood)
Bringing Reality to PCB Design
by Rob Irwin, Altium Limited
Seeding Multicore Infrastructure
Imperas Launches Open Virtual Platforms
(Bryon Moyer)
Better Mobile Media
QuickLogic Offers VEE (Kevin Morris)

JOURNAL WEBCASTS

CHALK TALK Low Cost FPGA with Serdes Lattice ECP2M Amelia Dalton talks with Bertrand Leigh of Lattice Semiconductor about low-cost FPGAs with multi-gigabit SerDes interface capability. (Lattice Semiconductor)

CHALK TALK Crossing the Gap between Algorithm and Hardware Implementation. Join Amelia Dalton as she learns how C++ and Catapult C Synthesis can accelerate the design, implementation, and verification of complex system-level algorithms. (Mentor Graphics)

Approaching Yield in the Nanometer Age-DFM Methodology. As we dive deeper into the nanometer era, we must rethink the way we design. Tools, techniques, and methods that once worked without fail cannot hold up at the 65 and 45nm depths, making it more challenging than ever to achieve yield. This tutorial explores these challenges within both the business and historical context of the IC design and manufacturing process. (Mentor Graphics)

CHALK TALK CES 2008. Did you miss CES? Amelia Dalton didn't! Watch Journal Webcasts coverage of the event now.

CHALK TALK Meeting The Challenges of FPGA Design With Synplify Premier. Join Amelia Dalton as she investigates several new design technologies that address the top challenges faced by FPGA designers today. (Synplicity)

CHALK TALK Accelerate SoC and ASIC Verification Using FPGA Prototypes. Join Amelia Dalton as she explores methods of ASIC verification available today and why FPGA-based prototypes offer the most affordable and most powerful solution. (Synplicity)


CHALK
TALK
Advancing SoC Verification Methods.
Join Amelia Dalton as she talks with experts from Mentor Graphics on processor-driven test and other techniques for solving your system-on-chip verification problems. (Mentor Graphics)


Java Earning Its Wings
Aonix Makes Real Time Almost Safety Critical (Bryon Moyer)

It happened just like that. In the middle of a conversation, he got a kind of misty look in his eyes, like something wasn’t quite right. His breathing became more labored, he hunched forward a bit, and the next thing you knew, he was in full heart attack mode. An ambulance was quickly called for; this is where seconds count. As the ambulance was en route, efforts were made to clear the way for the EMTs so that they could get to work as quickly as possible. The main door was propped open, and an attempt was made to reserve the spot in front for the ambulance. But just as the ambulance was getting close, a garbage truck came by and blocked access. The garbage men casually jumped down from the truck and started collecting the garbage. Attempts to get them to back off even for a moment were in vain; they were scheduled to collect the garbage, and by George, that’s what they were gonna do. The ambulance would just have to wait.

And this is why standard old off-the-shelf Java isn’t used in real-time or safety-critical applications. While its more restrictive design, as compared to C or C++, actually helps system reliability in many respects, reducing the chances for system failure, it’s got a few unpredictable, non-deterministic characteristics that just won’t fly. Literally.

There are, broadly speaking, three levels of criticality for system operation. Most software we overtly use is at the least critical level, as is evident each time we try to access a website and the request just doesn’t go through; no explanations, no apologies. Or each time our computer crashes for no good reason. (OK, purists might say there’s never a good reason for a computer to crash… I could be persuaded…). Way down deep under the hood, the operating system is managing events the best it can (a relative concept), and things happen when they happen, for better or for worse.

The next level of criticality is real-time: it matters when things occur. Here events have to happen at a specific time or with a specific delay or latency. This requires more discipline on the part of the OS. While we hardly ever deal with this kind of system directly, we might do so through the use of systems with embedded processors employing a real-time operating system (RTOS).

The last level of criticality is called safety-critical. This is for systems whose failure could endanger lives. Things simply must never go wrong; everything must be thought through, every nook and cranny of the software must be statically testable, and code must be traceable from source all the way to object code.

You might say that at the lowest level, nothing (much) is at stake; at the real-time level, important system functionality is at stake, and at the safety-critical level, lives are at stake.

So you might well imagine that standard vanilla Java – the software, not some fru-fru wannabe coffee drink – will have some trouble with both real-time and safety-critical applications. When it comes to deterministic behavior, garbage collection (GC) is generally exhibit A in The Impassive People In Black Suits vs. The Java Developers In Cutoffs. Because its onset can’t be predicted and may not be the same from run to run, it can’t be used for real-time operation.

And for traceability, well, things are even worse. The standard Java environment compiles source code to byte code and then executes the byte code on a Virtual Machine (VM). During execution, classes can be loaded dynamically – and through the use of agents, those classes can even be instrumented in real time, completely changing the behavior of the program. This absolutely runs afoul of the traceability requirements that say that every step of the reduction of code from source to object must be traceable. In fact, with standard Java, that reduction process doesn’t complete until run time, and it is done entirely out of the control of the program developer -- not the kind of thing that would give you a warm fuzzy feeling if your life depended on it.
[more]

Visit Techfocus Media


You're receiving this newsletter because you subscribed at our web site www.embeddedtechjournal.com.
If someone forwarded this newsletter to you and you'd like to receive your own free subscription, go to: www.embeddedtechjournal.com/update.
If at any time, you would like to unsubscribe, click here. (But we hope you don't.)
If you have any questions or comments, send them to comments@embeddedtechjournal.com.

All material copyright © 2003-2008 techfocus media, inc. All rights reserved.
Privacy Statement