a techfocus media publication :: March 18, 2008 :: volume X, no. 11

FROM THE EDITOR

This week, Bryon Moyer brings us a feature on planting the seeds for a viable software infrastructure for multi-core embedded development.  Imperas has just launched what the company calls “Open Virtual Platforms” (OVPs).  While OVPs certainly won’t slay the dragon of multi-core development complexity, they’ll put a few good spears in his side.  Bryon’s latest feature has the details.

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Kevin Morris – Editor
Embedded Technology Journal

EVENTS and ANNOUNCEMENTS

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LATEST NEWS

March 18, 2008

Mercury Computer Systems to Showcase Edge Computational Capabilities for C4ISR Systems at Navy League Expo

GrammaTech Announces First Fully Compatible Static-Analysis Tool for MITRE’s Common Weakness Enumeration Security Standard

MindTouch Releases Deki Wiki “Itasca”; the Ultimate Software Developer Collaboration and Mashup Platform

VMETRO Adds Industry’s First PCI Express™ Battery-Backed NVRAM Card to Umem Line

Proficy® Workflow from GE Fanuc Intelligent Platforms Digitizes Work Processes to Optimize Production

Renesas Technology Expands H8S Microcontroller Series, Adding Two New 16-bit Microcontrollers for Servers and Advanced Communication Equipment

Ambric to Showcase Its Am2045 MPPA Device and Present a Paper at SPIE Defense+Security 2008

March 17, 2008

Power Forward Initiative Releases Low-Power Design Methodology Guide

Altair Semiconductor Integrates MIPS Technologies' Analog and Processor IP in Ultra Low-power Mobile WiMAX Processor

Staccato Delivers Certified Wireless USB Native Device Development Kit

Microchip Technology Makes Adding Digital Audio to Embedded Designs Easy With New MPLAB® Starter Kit for dsPIC® DSCs

Freescale Introduces Highly Integrated, Scalable 8-Bit Microcontrollers for Automotive Market

March 14, 2008

MOST Book Provides an Introduction to the Basics and Applications of the Leading Infotainment Technology

March 13, 2008

Ambric to Showcase Its Am2045 MPPA Device and Present a Paper at SPIE Defense+Security 2008

Bayer MaterialScience debuts new grade of Makrolon® polycarbonate resin for demanding, high-brightness applications

March 12, 2008

GE Fanuc Intelligent Platforms Announces Strategic Relationship With Cavium Networks, Demonstrates Capability at MVACEC

MOST Cooperation Celebrates 10th Anniversary

GE Fanuc Intelligent Platforms Announces Telum™ 210 SAS AdvancedMC™ Module

Avnet Enhances Its Virtualization, Data Protection and Disaster Recovery Offerings with Double-Take Software

CURRENT FEATURE ARTICLES

Seeding Multicore Infrastructure
Imperas Launches Open Virtual Platforms
(Bryon Moyer)
Better Mobile Media
QuickLogic Offers VEE (Kevin Morris)
Multicore to Massively Parallel
(Dick Selwood)
Accelerating Persistent Surveillance Radar with the Cell Broadband Engine
by Jeffery Rudin, Mercury Computer Systems, Inc.
HDMI To Go
MIPS Makes Media Mobile (Kevin Morris)
Avoiding the Failure to Communicate
(Bryon Moyer)
ARM Mobilizes Graphics
Mali 2D Standards Buffet (Kevin Morris)

JOURNAL WEBCASTS

CHALK TALK Crossing the Gap between Algorithm and Hardware Implementation. Join Amelia Dalton as she learns how C++ and Catapult C Synthesis can accelerate the design, implementation, and verification of complex system-level algorithms. (Mentor Graphics)

Approaching Yield in the Nanometer Age-DFM Methodology. As we dive deeper into the nanometer era, we must rethink the way we design. Tools, techniques, and methods that once worked without fail cannot hold up at the 65 and 45nm depths, making it more challenging than ever to achieve yield. This tutorial explores these challenges within both the business and historical context of the IC design and manufacturing process. (Mentor Graphics)

CHALK TALK CES 2008. Did you miss CES? Amelia Dalton didn't! Watch Journal Webcasts coverage of the event now.

CHALK TALK Meeting The Challenges of FPGA Design With Synplify Premier. Join Amelia Dalton as she investigates several new design technologies that address the top challenges faced by FPGA designers today. (Synplicity)

CHALK TALK Accelerate SoC and ASIC Verification Using FPGA Prototypes. Join Amelia Dalton as she explores methods of ASIC verification available today and why FPGA-based prototypes offer the most affordable and most powerful solution. (Synplicity)

CHALK TALK Advancing SoC Verification Methods.
Join Amelia Dalton as she talks with experts from Mentor Graphics on processor-driven test and other techniques for solving your system-on-chip verification problems. (Mentor Graphics)


Seeding Multicore Infrastructure
Imperas Launches Open Virtual Platforms (Bryon Moyer)

Seeding a saturated solution for optimal crystal growth can be a tricky business. The highest-quality, largest crystals grow when given lots of time for the molecules to orient themselves in the lattice. Seeding too late can result in chaotic explosive nucleation, small granularity, and low quality. Seed too early, and, well, there may not technically be a problem, but being an impatient species, if we don’t see crystal growth quickly enough, we tend to get bored and move the seed elsewhere.

Saturation is something of a measure of potential, of pent-up demand. There is more and more willingness to orient along coordinated lines, but that initial seed is missing, around which everything can congregate. The multicore market, while ballyhooed for some time now, has grown slowly because of the need for new programming models and development infrastructure. Demand has existed, but it hasn’t been compelling enough to drive a robust commercial marketplace. Those companies that were either forced into multicore or saw first-mover opportunities there have tended to create their own tools, keeping them proprietary for convenience or competitive advantage. Things are very fractured, with few clear trends.

We’re getting to the point now, however, where embedded multicore is going to have to step out of the shadowy corners and take on mainstream status. Demand has slowly built for common infrastructural elements around which to build a toolchain. In particular, there’s a need for a way to validate and debug software programs before the hardware is available. Hardware simulators are too slow and provide more precision than is needed for most application development; a higher-level simulation model can provide accurate enough behavior at reasonable performance. While it’s too expensive for everyone to do their own from scratch, everyone seems to be waiting for someone else to go first.

Imperas has decided that this means the solution is now saturated enough to warrant seeding some crystallization, but not super-saturated to the extent that chaos would ensue. It’s still early enough for alignment to occur in an orderly fashion, and so they’ve announced the formation of the Open Virtual Platforms alliance, or OVP, and have seeded it with some of their technology.

There are three basic components to the OVP: APIs, models, and a reference simulator that they have named OVPsim. The APIs provide a consistent interface for modeling all of the elements of a platform, as well as the platform itself. The main APIs are the modestly-named Innovative CPU Manager (ICM) for creating platforms; the Virtual Machine Interface (VMI) for creating processors; Behavioral Hardware Modeling (BHM) for handling processes, delays, and events; and Peripheral Programming Model (PPM) for creating peripheral interconnections. They’ve provided the C header files and documentation. [more]

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