FROM
THE EDITOR
Multicore devices are beginning to make a significant impact on the desktop and could offer considerable benefits for embedded applications. The embedded world is already familiar with systems having multiple processors; just look at a cell-phone handset. However, European Editor Dick Selwood discovers doubts about whether the tools that make multicore devices easy to use are yet in place.
Continuing with the multi-core theme, in our second new article this week, Jeffery Rudin of Mercury Computer Systems explains how Mercury used the Cell engine (designed for video gaming) for a high-performance circular synthetic aperture radar application. Some of the highest performance multi-core processing engines being designed today are aimed at the lucrative video game market, so taking advantage of that technology makes a lot of sense.
Thanks for reading! If there's anything we can do to make our publications more useful to you, please let us know at: comments@embeddedtechjournal.com. If you'd rather sound off in public, please post your comments or questions in our new Journal Forums.
Kevin
Morris – Editor
Embedded Technology Journal
|
EVENTS and ANNOUNCEMENTS
Mixed-Signal ASICs from ChipX
- USB 2.0 & PCI Express ASIC Designs and FPGA conversion
- USB-IF & PCI-SIG certified ASICs
- Standard Cell, Hybrid ASIC and Structured ASIC solutions
- Low NRE, fast Time to Market, USB & PCIe ASIC platforms
 Click Here to Win a PCIe Development Board.
|
NEW!! IC Journal - Do you love Embedded Tech Journal? We're happy to announce our new IC Design and Verification Journal. It'll be just like Embedded Tech Journal except, you know, about ASICs and stuff.
 Subscribe today for free.
|
|
|
JOURNAL WEBCASTS
NEW!!  Approaching Yield in the Nanometer Age. This tutorial goes into detail on DFM technical challenges and solutions within both the business and historical context of the IC design and manufacturing process. It shows the importance of the fabless model as part of a more holistic DFM methodology, and includes demonstrations of what the new tools look like. (Mentor Graphics)
CHALK TALK  Meeting The Challenges of FPGA Design With Synplify Premier. Join Amelia Dalton as she investigates several new design technologies that address the top challenges faced by FPGA designers today. (Synplicity)
CHALK TALK  Accelerate SoC and ASIC Verification Using FPGA Prototypes. Join Amelia Dalton as she explores methods of ASIC verification available today and why FPGA-based prototypes offer the most affordable and most powerful solution. (Synplicity)
CHALK TALK  Advancing SoC Verification Methods.
Join Amelia Dalton as she talks with experts from Mentor Graphics on processor-driven test and other techniques for solving your system-on-chip verification problems. (Mentor Graphics)
CHALK TALK  Real World Solutions for FPGAs in Ultra Low Power Applications. Join Amelia Dalton as she examines the Low Power Reference Platform from Arrow, Altera, and Linear Technology - proving that FPGAs really can run on batteries. (Altera, Arrow, Linear)
|
|
Multicore to Massively Parallel
(Dick Selwood)
“There is a lot of hype about multicore, but there is no infrastructure to support it.” A throw-away remark from a senior figure in an embedded tools company was the start of this article. Certainly he didn’t want to be quoted directly, which made me greatly to wonder. As I started researching the issues I talked to a number of people across the industry. The choice wasn’t scientific or comprehensive - just people I thought might have opinions that were valuable, whose company had recently made an announcement in this area, written an article that turned up in Google, or who I happened to bump into. If I haven’t spoken to you and you have a product that addresses the issues addressed, please get in touch.
The first issue was that of definition – what do you think of as multicore? The term was hi-jacked by Intel with the Core-Duo announcements. Intel argued that Moore’s law meant that power consumption would continue to rise with processing speed. To get round this, Intel proposed replacing a single, watt-burning high-performance processor with two or more lower-powered processors to share the load. Each core has its own Level 1 (L1) cache, and the Level 2 (L2) cache is shared and used for communicating between processors. One way to use the power is to assign the OS, which has to be multicore aware, to one or more cores and assign applications to other cores. This doesn’t present too many difficulties to the developer, and there are rarely any significant issues in execution. (And, as one cynic put it, with most desktop apps, you get used to occasional crashes.)
[more]
|
|
Accelerating Persistent Surveillance Radar with the Cell Broadband Engine
by Jeffery Rudin, Mercury Computer Systems, Inc.
Multicore processing chips answer the power-energy challenge while increasing processing capability. For many years, increasing the computational power of processing chips has been achieved by increasing the core-clock frequency. However, this boosts the required input power and cooling by the cube of the frequency. A partial answer is achieved by using superscalar, single-instruction multiple-data (SIMD) architectures and larger memory caches. Multicore technology takes this trend a step further through the use of multiple full-function cores, each with its own local memory, on a single chip. Surprisingly, the movement toward multicore technology has not been driven by military applications, but instead by the video gaming industry.
Circular Synthetic Aperture Radar
Airborne Synthetic Aperture Radar (SAR) has been used for reconnaissance in environments where electro-optic and infra-red technologies cannot be used such as during the night or when the scene is obscured by weather conditions. SAR provides the war fighter with a flyby snapshot of an area that can be used for terrain mapping, targeting, and assessment of troop movement. In addition, because SAR uses coherent processing, it can literally find “footprints in the sand” where the other technologies cannot. Because of the power of today’s modern processors, many operations such as these can be performed with a single-processor core. However, the mission is changing. [more]
|
|
