Embedded Technology Journal Update

a techfocus media publication :: November 13, 2007 :: volume IX, no. 07

FROM THE EDITOR

This week, our newest feature article examines the newest entrant in the system on chip (SoC) processor core derby. Altera and Synopsys are partnering to bring the popular-in-FPGA-circles Nios II core to ASIC design. Our latest feature examines why you might want to think about it for your next project.

Thanks for reading! If there's anything we can do to make our publications more useful to you, please let us know at: comments@embeddedtechjournal.com. If you'd rather sound off in public, please post your comments or questions in our new Journal Forums.

Kevin Morris – Editor
Embedded Technology Journal

EVENTS and ANNOUNCEMENTS

New Embedded Evaluation Kit Dispels Old FPGA Design Myths. Discover the Truth.
The old myths about designing with FPGAs are no longer true. Today’s FPGAs are inexpensive, consume less power, and easy to use. Prove it for yourself with Altera’s new Nios II Embedded Evaluation Kit.
Get the facts and enter to win a FREE kit today.

Want to boost MCU performance without increasing cost? Make the move to 32-bit with the MIPS32® industry-standard architecture. Whatever your MCU design, MIPS has a total system solution for all your processor and peripheral IP. Check out MIPS Technologies for your next 32-bit MCU design.
Learn more!

Display System Embedded Design with FPGA Webcast
This webcast examines the embedded market challenges motivating development teams to use programmable devices. Application examples show the use of Instant-On FPGA devices and IP in embedded display designs.
Sign up!

Did you miss the ARM Developers' Conference?
Join Amelia Dalton, host of Journal Webcasts for Journal Webcasts' coverage of the ARM Developers' Conference. Journal Webcasts brings you interviews with key participants, booth visits, and quite a few other surprises from from the ARM Developers' Conference & Design Pavilion.
Click here to register

Free Job Postings on Journaljobs.com
JournalJobs.com – the job board for FPGA Journal and Embedded Technology Journal is now re-launching with a host of new features and capabilities. In celebration of JournalJobs.com grand re-opening, we’re offering free job postings through December 31, 2007. Go online, post a job, pay nothing, and watch for those qualified resumes to come knocking on your inbox.
Click here to post your job listing on Journaljobs.com

CURRENT FEATURE ARTICLES

New Kid in Class
Nios II Joins the Processor IP Race
Open Handset Alliance
Gorilla in Sheep’s Clothing?
MIPS Mulls Microcontrollers
New 32-bit MCU Line
GMACs GAP
ESL Spans the Software/Hardware Chasm
Industrial Revolution
Freescale Helps Consolidate Control
From Servers to Smartphones
Virtualization Invades Embedded
Happy Birthday
Embedded Tech Journal Turns Two
Breaking New Ground
ARM Dev Con and Stuff

JOURNAL WEBCASTS

NEW!! Advancing SoC Verification Methods – Join Amelia Dalton as she talks with experts from Mentor Graphics on processor-driven test and other techniques for solving your system-on-chip verification problems. (Mentor Graphics)

Real World Solutions for FPGAs in Ultra Low Power Applications - Join Amelia Dalton as she examines the Low Power Reference Platform from Arrow, Altera, and Linear Technology - proving that FPGAs really can run on batteries. (Altera, Arrow, Linear Technology)

Did you miss the ARM Developers' Conference? Join Amelia Dalton for Journal Webcasts' coverage of the event - it'll be just like you were there! (Journal Webcasts)

Video Processing: Making the Picture Clear
(Texas Instruments)

Tips to Avoid Simultaneous Switching Output (SSO) Noise Problems (Lattice)

Leverage the best performance and debug features with the latest release of ModelSim (Mentor Graphics)

New Kid in Class
Nios II Joins the Processor IP Race

He doesn’t just slip quietly into the back of the classroom. He sits sideways in his desk, fidgets nervously, and makes the other kids ill-at-ease. His classmates eye him cautiously. He looks different, has a strange accent - maybe he even smells funny. Back in his old school, he ruled the roost, but here, he’s got to fight his way up the popularity ladder from the very bottom. A new kid is always a disruption to the class, even if he’s well behaved, mild mannered, and courteous. An additional competitor disrupts the status-quo, and the arrival of the interloper immediately initiates a re-visiting of the pecking order.

Altera and Synopsys announced an ASIC-optimized version of Altera’s Nios II processor architecture this week. In the standard-cell ASIC arena, Nios is a newcomer. Nios II is a 32-bit RISC architecture, not remarkably different from ARM or MIPS offerings, but it brings different advantages to the table that may have many engineering teams re-thinking their decision-making criteria for selecting a processor architecture.

In the “good old days” processors were picked on their own merits. If you could deliver more performance, lower power consumption, or a superior instruction set, you stood a good chance of knocking out your rivals and winning the socket. After awhile, however, design teams got more sophisticated. The performance of the processor itself took a back seat to the development environment – the time and money you could save with robust development tools and a strong ecosystem outweighed the small (and temporary) advantages one processor might enjoy over another. [more]