FROM
THE EDITOR
This week, we take a trip back to some of the winners of Microsoft's
Embedded Student ChallengE (Why IS that "E" capitalized, anyway?) in a closer look at the challenge offered
back by the students - learn to design your embedded systems more efficiently or perish. Without the benefit of
boatloads of industry experience, corporate infrastructure, or legacy design components, these students whipped out a
sophisticated embedded system design faster than most of us can re-balance our 401K account. Can we industry veterans
learn something from the students, perhaps?
Our Journal Jobs website is sporting new
features, new jobs, and a host of new opportunities for employers and job seekers alike. If you
haven’t visited www.journaljobs.com
lately, stop by and see what’s cooking in the world of technology employment.
Thanks
for reading! If
there's anything we can do to make our publications
more useful to you, please let us know at: comments@embeddedtechjournal.com
Kevin
Morris – Editor
Embedded Technology Journal
|
ANNOUNCEMENTS
Learn how Jaluna OSware™ real-time virtualization™ technology enables multiple operating systems to run simultaneously on the same processor while satisfying hard real-time requirements. By sharing hardware resources and combining commercial or proprietary RTOS with a rich OS such as Linux, system designers can add more functionality while lowering bill-of-materials and development costs.
 Download the free whitepaper here
|
FPGA AND STRUCTURED ASIC JOURNAL
A weekly e-mail newsletter from techfocus media (publishers of Embedded Technology Journal) dedicated to the design and application of FPGA and structured ASIC technology.
 SUBSCRIBE NOW - FREE!
|
|
JOURNAL WEBCASTS
JOURNAL WEBCASTS ON DEMAND:
"Designing 2Gbps Parallel I/O with the LatticeSC FPGA" sponsored by Lattice Semiconductor
 Click here to watch!
Lattice's new 90nm LatticeSC family--general introduction, sponsored by Lattice Semiconductor.
 Click here to watch! |
|
|
Students Throw Down the Gauntlet
Time to Speed Up Your Embedded Development
I long ago lost count of the number of years and PowerPoint presentations I have digested containing
messages like "system design cycles are getting shorter" and "time to market pressure is increasing." Somehow,
though, despite years of shrinking, most electronic product development cycles have changed very little. It's a paradox of embedded
system design. As we increase our design efficiency, we seem to add more features and complexity to our systems, causing the
design cycle to expand back to our level of comfort, and perhaps laziness. There seems to be a magic number somewhere in the 18-24
month range that captures a vast number of product design cycles. Despite explosive waves of technology and tool improvement,
that cycle has remained almost constant for a couple of decades.
A few weeks ago, in our "Environmental Embeddedness" article, we discussed the Microsoft Windows Embedded Student
ChallengE, where student design teams were asked to design and develop embedded systems capable of giving something back to the
world – preserving, protecting, or enhancing the environment. This week, we caught up with one of the winning teams in order
to get more insight into the kind of product development process that could go through marketing requirements definition,
specification, development, debug, and testing, even generating the marketing rollout presentation with a new development team,
all in a total period of less than six months. [more]
|
 |
