ANNOUNCEMENTS

MIPS Goes Multithreaded
Boosting Performance the New-Fashioned Way

Just about every type of racing has a formula. From sailing yachts to sports cars to powerboats, the formula for each league defines the basic parameters within which the competitors must work to achieve maximum performance. For race car engines, the formula might dictate maximum displacement, limits on turbocharger boost, fuel type and burn rate, even basic engine design. For yachts, it might contain parameters like maximum length, sail area, freeboard, mast height, draft, and headsail height. If anything changes about the formula, the nature of the optimal design might be dramatically altered.

Although most designers don’t often consider it, there are different formulas for best overall system performance from embedded and stand-alone processors, too. Even though there’s no governing league making and changing the racing regulations, parameters like total system cost, power consumption, memory bandwidth, silicon area, and process profile rule the day when choosing a processor for your system design. The tradeoffs that make the best mix of performance on standalone processors can be completely different than those that give the best results in an embedded processor core.

When MIPS designed their new 34K core, which was announced this week, they clearly knew they were working under the usually unspoken embedded core racing formula. In an embedded core, cranking up the clock frequency runs up system cost and power consumption for your entire device, not just the processor portion. Heavily pipelined, superscalar, and very-long-instruction-word (VLIW) architectures directly consume more logic and are difficult to optimize, particularly in embedded applications. Multi-core methods are already implemented by default, simply because you’re dealing with embedded processors, but the licensing fees for multiple cores can run up the system cost tab again. Many of these solutions that work well are not well suited for the embedded core environment. [more]

February 7, 2006

Enhanced RapidWorx(TM) Design Kit From LSI Logic Accelerates Time to Revenue for SoC Designs

Digi Releases High Performance XScale(R)-based ConnectCore(TM) Module for Demanding Embedded Applications; ConnectCore(TM) XP offers full Linux and Windows(R) CE support

TimeSys Introduces Free LinuxLink Evaluation Subscription for Pentium-class Processors; Enables Users to Perform Embedded Development Tasks Key to Creating a Commercial-grade Custom Linux Platform

Atmel Announces WiMAX Specific Transceiver

Altera and TelASIC Announce Breakthrough Power Efficiency for 3G/3.5G Wireless Base Station Radios

Xilinx Ships FPGA Industry's Only Compliant Programmable x8 PCI Express IP Core

STMicroelectronics and Freescale Launch Broad Technology Agreement for Automotive Applications

February 6, 2006

New Multi-threading Solution from MIPS Technologies Delivers Significant Gains in System Performance for the Embedded Market

Microchip Technology Offers 16-bit dsPIC30F Digital Signal Controllers with High-Performance PWM for Motor Control, Lighting and Power Conversion; Two More dsPIC(R) Digital Signal Controllers Now In Production

First Silicon Solutions (FS2)(R) Introduces System Navigator(TM) for MIPS32(R) 34K(TM) Debug; FS2 System Navigator Supports PDtrace(TM) and Multi-VPE Debug

IBM and Freescale Collaborate on Direction of Power Architecture(TM) Technology
International Solid-State Circuits Conference (ISSCC)

February 6, 2006 (continued)

Java(TM) Developers Explore Aonix New Hard Real-Time Solution

Cypress Delivers Programmable Spread Spectrum Clock Oscillator With Embedded Crystal in Industry-Standard 5.0 x 3.2-mm LCC Package and Pinout; Pre-Matched Crystal Saves Design Time and Cost; Small Package Saves Board Space

CoWare Adds MIPS32(R) 34K(TM) Processor Support Package to SystemC-based Model Library; Expansion of CoWare Model Library Enables Development of Optimal Architectures for MIPS32 34K-based Systems

EVE to Exhibit Hardware-Assisted Verification Platform at DesignCon; Continuous Demonstrations of ZeBu Planned

New Multi-threading Solution From MIPS Technologies Delivers Significant Gains in System Performance for the Embedded Market

Mobileye Licenses MIPS Technologies' Multi-threading MIPS32(R) 34Kf(TM) Core for Next-Generation Driver Assistance SoC

Altera's Stratix II FPGAs Enable 667-Mbps DDR2 SDRAM Data Rate

Virtio Virtual Platforms Jumpstarts Software Development for MIPS32 34K Core Family

February 2, 2006

LSI Logic Announces Low Profile SATA II 3Gb/s MegaRAID(R) Adapter

February 1, 2006

MoSys Inc. Announces Licensing Agreement with YAMAHA Corporation; Targets High-Density Embedded Memory Products for Advanced Multimedia Mobile Phones