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Changing Waves The surfer is insignificant to the wave. He has no control over its speed, power, or direction. The wave will begin, travel, and terminate with no consideration for the parasitic passenger that slides smoothly down its forward surface. When we hitch a ride on a wave, we can control only ourselves. We endeavor to maneuver in such a way that we capitalize most on the energy of the wave itself, but we cannot affect its ultimate fate. For over four decades, progress in processing power has ridden the crest of a massive breaker called Moore’s Law. We needed only to position our processing boards along the line of travel at the right time, and our software was continuously accelerated with almost no additional intervention from us. In fact, from a performance perspective, software technology itself has often gone backward – squandering seemingly abundant processing resources in exchange for faster development times and higher levels of programming abstraction. Today, however, Moore’s Law may be finally washing up. Even though physics may stick with us through a few more process nodes, it’s pretty clear that economics will probably turn us off first. From a thermal perspective, we’ve already hit the wall with heat on high-performance processors, making multi-core strategies more appealing than trying to squeeze another few flops out of a single-thread processor. It’s almost time to change waves. Before Moore’s breaker crashes on the beach and we get caught inside, we need to cutback and bail - slide down off the wave and paddle back out, dipping through a few mushier swells looking for the next bluebird breaking offshore that can bring us in even faster. As embedded designers, why should we care? After all, aren’t we on the back end of the train that’s led by exotic supercomputers, trickles down through networks of pedestrian personal computers, and ends with our often cramped, constrained embedded applications? The answer is “probably not for long.” One might argue that many embedded applications hit the power/performance threshold even before high performance computers, the latter benefiting from plentiful power supplies and copious cooling while the former is often restricted by limited battery power, tight enclosures, and miserly BOM budgets. We have to resort to more elegant software and architectural remedies when we can’t just widen the bus, double the gate count, or crank up the toggle rate. [more] |
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