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November 27, 2007 12:01 AM Pacific Time
OneSpin to Present Verification Keynote, Host Verification Productivity Panel at IP07 Conference in GrenobleSTMicroelectronics, Infineon, Certess, Cadence and OneSpin to explore ‘Highest Quality IP: Dream or Reality’
IP07
Booth #6
MUNICH, Germany & SUNNYVALE, Calif.--(BUSINESS WIRE)--OneSpin Solutions GmbH, an electronic design automation (EDA) company that provides award-winning, customer-proven formal verification solutions, will present the verification keynote at IP07 – the IP-focused electronic system conference and exhibition – and take part in a verification panel the company organized. OneSpin also will demonstrate its verification solutions at Booth #6. The keynote “Functional Verification of IP: Quo Vadis?” will be presented by Dr. Wolfram Büttner, founder, managing director and chief technology officer of OneSpin. The verification panel, “Highest Quality IP: Dream or Reality?” features participation by STMicroelectronics, Infineon Technologies AG, Certess, Inc., Cadence Design Systems, Inc. and OneSpin. It will be moderated by Peggy Aycinena, editor of EDA Confidential, contributing editor to EDA Weekly, and DACeZine columnist.
About OneSpin Solutions Electronic Design Automation (EDA) company OneSpin Solutions provides award-winning, innovative formal verification solutions that ease and speed verification, and deliver the highest achievable functional quality for ASICs and FPGAs. Market-leading telecommunications, automotive, computer, and embedded system companies rely on OneSpin's verification technology. For further information please visit http://www.onespin-solutions.com or email info@onespin-solutions.com.
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