Certess to Present Embedded Tutorial Panel at the 2007 Design Automation and Test Conference

Design Automation and Test in Europe 2007

CAMPBELL, Calif.--(BUSINESS WIRE)--Certess, Inc., an electronic design automation (EDA) company focusing on functional qualification for companies that create and integrate complex design blocks or intellectual property (IP), today announced that the company will present a tutorial on “Heterogeneous Systems on Chip and Systems in Package” at the DATE (Design Automation and Test Europe) Conference held on April 17-19, 2007 in Nice, France.

WHO: Certess, Inc.

WHAT: Embedded Tutorial Panel: "Heterogeneous Systems on Chip and
Systems in Package." Mark Hampton, Certess' chief technology
officer and co-founder, will present. This embedded tutorial
and panel aims to confront several points of view on the
miniaturization of existing systems to the creation of
specific integrated functions, MEMS and non-electronic devices
that are being integrated to create heterogeneous systems in
package and systems on chip. This tutorial session will be
moderated by Ian O'Connor, Ecole Centrale de Lyon, FR and
additional speakers are Krish Chakrabarty, Duke University,
Nicolas Delorme, CEA-LETI and Juergen Hartung, Cadence,
Europe.

WHERE: 2007 DATE Conference, Acropolis, Nice, France. For more
information please visit www.date-conference.com.

WHEN: Wednesday, April 18, 2007 at 11:00 AM.

About Certess

Certess, Inc is an electronic design automation (EDA) company focusing on functional qualification for companies that create and integrate complex design blocks or intellectual property (IP). The company’s technology will provide verification engineers with an objective way to evaluate and improve the completeness of the verification environment, resulting in a shorter and more predictable process to integrate SoC designs. The company is headquartered in Silicon Valley. For additional information, see www.certess.com.