Optimal Corporation Expands System-in-Package Analysis With Chip-Package-PCB Co-Design Capabilities

New Features Include Enhanced Chip-Package Models, Unified SiP, Package-PCB Modeling, Dynamic IR Visualization

SAN JOSE, Calif.--(BUSINESS WIRE)--Optimal Corporation, a leader in IC package and PCB signal, power and thermal integrity analysis, announced enhanced capabilities to its Optimal SiP Analysis Suite, software for System-in-Package (SiP) design, with the addition of chip-package-PCB co-design support.

Among the latest features are improved SiP and package models for automatic port mapping between chip and package analysis, the ability to combine SiP, package and PCB models with a common meshing approach and dynamic IR visualization. Introduced earlier this year, the Optimal SiP Analysis Suite models complex structures, including mixed flip chip and wirebond assemblies, die stacks with interposers and spacers, double-sided assemblies and perforated power planes.

Complexity is driving the move to SiP design as more I/Os are switching at higher frequencies and the availability of new 3D physical structures. Additionally, designs need to offer better functional density -- that is, more chips in a package operating at lower voltages while consuming more power.

“SiP design demands that chip, package and PCB designers collaborate effectively if they are to satisfy market requirements,” says Dave DeMaria, chief executive officer of Optimal Corporation. “Through co-design, our latest capabilities enable unified 3D signal and power integrity analysis of the integrated system for lower costs while meeting performance targets.”

Chips, SiPs, IC Packages Don’t Float in Space

Today’s chips are assembled onto packages or SiPs. While delivering clean power to a chip’s core and I/O ring is critical for timing, most IC power analysis is done with component models that do not accurately reflect the complex interaction of the SiP, package and PCB system. Optimal’s SiP and package models represent real-world boundary conditions for IC power analysis and the models streamline integration with IC power analysis thanks to the automatic mapping of ports between the chip and package. Used with IC power analysis and optimization tools such as Apache’s RedHawk-EV, the capability gives engineers added confidence in simulation accuracy and subsequent correlation between simulation and measurement.

A common approach to SiP design is to stack packaged die -- package-on-package (PoP) or package-in-package (PiP) -- because the “Known Good Die” problem is caused by an inability to test a bare die completely before assembly. The final component is assembled onto a PCB but, at high frequencies, different physical component boundaries don’t always equate to good electrical model boundaries. The Optimal SiP Analysis Suite merges geometry from package, SiP and PCB designs and then uses a common meshing approach across all fabrics for unified signal, power and simultaneous switching noise (SSN) model generation.

System designers struggle over where to place decoupling capacitors (decaps) for optimized circuit performance. The traditional approach of throwing decaps across a wide frequency spectrum is costly and wasteful. And, modeling the board, package and die as separate structures, with independent decap requirements, is impractical for a cost-conscious product plan. Optimal’s dynamic IR visualization analyzes the power delivery system, locates resonances and identifies appropriate capacitance values for the optimal number and placement of capacitors for the design.

Pricing and availability

The Optimal SiP Analysis Suite, integrated into all the major SiP design flows, is priced starting at $65,000 (U.S.) per seat for a perpetual license and runs on the Windows operating system.

About Optimal Corporation

Optimal Corporation is the leader in 3D power, signal and thermal integrity analysis for IC Package, System-in-Package (SiP) and PCB design. Its innovative solutions enable design teams to concurrently analyze and optimize the IC with the package and the packaged IC on the PCB. By providing high-performance, ease-of-use and pinpoint accuracy, Optimal’s solutions allow engineers to quickly create designs optimized for power and signal integrity. Through seamless integration with all of the major CAD design flows, its solutions help customers achieve fast and efficient design time. Optimal’s technology is embedded within the Cadence Allegro design flow and endorsed in the TSMC Reference Flow. Optimal, founded in 1995, is a TSMC Technology Alliance Partner and a member of the Cadence Connections Emerging Solutions Program. Optimal Corporation is located at: 6980 Santa Teresa Blvd., Suite 100, San Jose, Calif. 95119-1346. Telephone: 408-363-6300. Facsimile: 408-363-6305. Email: info@optimatlcorp.com. For more information, visit: www.optimalcorp.com.

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