Renesas Introduces SH-MobileR, a Multimedia Application Processor That Powers Portable Media Players, Video-VoIP Solutions and TV Enabled Navigation Systems

Support for the Device Includes a Linux® Multimedia Platform That Accelerates Time to Market and Reduces Development Costs

SAN JOSE, Calif.--(BUSINESS WIRE)--Renesas Technology America, Inc. today announced the SH-MobileR (product name: SH7722), a sophisticated single-chip processor solution for video and digital TV enabled devices, including car navigation systems, portable media players and VoIP video phones. The robust processor is a complete hardware implementation that supports next-generation video standards and minimizes power consumption for long battery life. By achieving 478 million instructions per second (MIPS) performance in the Dhrystone v2.1 benchmark, the device gives multimedia systems the power to deliver powerful user experiences. Built on Renesas’ SH-Mobile Series platform, which has been widely adopted in mobile handsets, the SH-MobileR device adds a new level of multimedia capability for applications beyond mobile phones.

“Deployment of digital broadcasting and broadband networks has led to the introduction of new multimedia terminals such as mobile phones, car navigation systems, and portable media players with mobile digital TV capabilities,” said Brian Davis, director of business development, Renesas Technology America, Inc. “The SH-MobileR multimedia application processor builds on the experience Renesas has gained producing chips now used in many mobile phones that support terrestrial digital TV broadcasting.”

At the heart of the SH-MobileR are a hardware video processing unit that supports the video decoding and moving-image processing necessary for the reception of terrestrial digital broadcasting services, and a hardware image processing engine. The video processing unit is a very low power hardware engine for compressing and decompressing video in H.263, MPEG-4, and H.264 formats used in digital broadcasting, portable media appliance, and IP networked video telephony applications. The device minimizes total power consumption while displaying smooth moving images equivalent to that of a standard TV when decoding a compressed signal at bit rates up to 8Mbps.

To complete the host-based solution, the SH-MobileR processor integrates a camera interface that allows direct connection to a 5-megapixel-class camera module. This versatile low power hardware implementation enables a rich set of image-processing functions, including image scaling, rotate, color conversion, and blending of multiple planes of images. A built-in JPEG hardware accelerator enables the fast capture and display of JPEG images, while an on-chip 24-bit TFT color LCD controller delivers excellent image quality. An on-chip 2D graphics accelerator delivers responsive graphic user interface (GUI) performance for enhanced graphic quality. The application processor also has a video output unit for connections to National Television System Committee (NTSC) and phase-alternating line (PAL) TVs.

The SH-MobileR device incorporates an SH4AL-DSP CPU core that runs at speeds up to 266MHz providing 478-MIPS of performance for the parallel processing of a browser and multiple large-load applications, as well as interactions with a general-purpose operating system (OS) such as Linux. A 64-bit wide bus allows connections to data stored in external SDRAM, and an on-chip USB 2.0 function (high-speed compatible) enables fast links to PCs. The device also has a 4-Gbit NAND/AND flash memory interface with an ECC (error correction code) capability that has been improved from 3 to 4 symbols, as well as an SD memory card (SD memory/SD I/O) interface. The SD memory card interface supports an optional CPRM function, enabling the implementation of terrestrial digital broadcast recording and playback.

Accelerating Deployment of Multimedia Devices

To accelerate system designs, the SH-MobileR device is supported by a rich Linux software solution that includes open source tools and device driver code for the SH-MobileR based Solution Engine development platform. For that platform, Renesas has developed and integrated highly efficient multimedia middleware, including H.264, MPEG-4, as well as MP3, AAC (Advanced Audio Coding), G.7xx series speech codecs and echo cancellation algorithms. Certain DRM (Digital Rights Management) functions are also available for the design of audio-visual systems that protect copyrighted material. In addition, third-party partner companies are working to pre-qualify V2IP stacks, 2D and 3D graphics libraries, and other key technologies used in embedded multimedia applications that use the SH-MobileR application processor.

Product Name
Maximum Operating
Frequency

Package
Sample Price/
Availability

SH-MobileR: SH7722
(R8A77220C266BGV)
266MHz 449-pin
BGA $25.60/
October 2006

Reader contact

Readers can find additional product and contact information on the Renesas Technology Web site at www.renesas.com.

About Renesas Technology Corp.

Renesas Technology Corp. is one of the world’s leading semiconductor system solutions providers for mobile, automotive and PC/AV (Audio Visual) markets and the world’s No.1 supplier of microcontrollers. It is also a leading provider of LCD Driver ICs, Smart Card microcontrollers, RF-ICs, High Power Amplifiers, Mixed Signal ICs, System-on-Chip (SoC), System-in-Package (SiP) and more. Established in 2003 as a joint venture between Hitachi, Ltd. (TOKYO:6501) (NYSE:HIT) and Mitsubishi Electric Corporation (TOKYO:6503), Renesas Technology achieved consolidated revenue of 906 billion JPY in FY2005 (end of March 2006). Renesas Technology is based in Tokyo, Japan and has a global network of manufacturing, design and sales operations in around 20 countries with about 26,200 employees worldwide. For further information, please visit http://www.renesas.com.

Note to Editors: A specification summary is included in this release, and a photo and block diagram of the SH-MobileR application processor are available.

Notes: 1. SH-Mobile (SuperHTM Mobile Application Processor):
An original Renesas Technology processor for mobile phone
systems that is connected to a baseband LSI and performs
dedicated processing of audio, video, and similar
multimedia applications
SuperH is a trademark of Renesas Technology Corp. Linux is a registered trademark of Linus Torvalds in the United States and other countries. Other product names, company names, or brands mentioned are the property of their respective owners.

Specifications: Renesas Technology SH-MobileR Application Processor

Item SH-MobileR Specifications
Product Name (part #) SH7722 (R8A77220C266BGV)
CPU core SH4AL-DSP (incorporating a memory management unit [MMU])
Power supply voltage Internal: 1.15V to 1.3V; External: 3.0V to 3.6V
Maximum operating frequency 266MHz
Maximum processing performance 478 MIPS (at 266MHz operation)
On-chip RAM 128Kbytes
Cache memory Separate 32Kbytes for instructions and 32Kbytes for data
4-way set-associative type

X/Y memory (for DSP) 16Kbytes
External memory Dedicated SDRAM memory controller
Connectable via 16-, 32-, or 64-bit bus width
Maximum operating frequency: 106.7 MHz

Local bus controller
Burst ROM, SRAM, PCMCIA, etc. connectable
Connectable via 16-bit or 32-bit bus width
(When SDRAM is connected via 64-bit bus width, local bus has 16-bit bus width)
Maximum operating frequency: 66.7MHz

On-chip peripheral functions 5-megapixel camera support functions
VPU4 (H.264, MPEG-4 full hardware accelerator)
JPEG hardware accelerator
DMAC x 6 channels
USB Function (USB 2.0 high-speed compatibility)
Video output unit
24-bit TFT color liquid crystal compatible LCD controller
2D graphics accelerator
Sound interface unit x 1 channel
32-bit timer unit x 3 channels
32-bit compare match timer x 1 channel
16-bit timer pulse unit x 1 channel
Real-time clock x 1 channel
Watchdog timer x 1 channel
H-UDI on-chip debugging function

Interfaces Video I/O (camera module direct connection interface)
I2C bus interface(2) x 1 channel
Key scan interface
Synchronous serial interface x 1 channel
Serial interface with FIFO x 2 channels
Asynchronous/synchronous serial interface x 3 channels
IrDA interface (v1.2a compatible)
SIM card interface
4-Gbit NAND/AND flash memory interface
SD Memory Card interface

Power-down modes Sleep mode
Standby mode
U standby mode

Package 449-pin BGA (21mm x 21mm, 0.8mm pin pitch)

(2) I2C bus (Inter IC Bus) is an interface specification proposed by Royal Philips Electronics of the Netherlands.