Virage Logic's DAC Program Features Integrated Design Solutions for Accelerating Silicon Success; IP Industry Leader Showcases VIP Partners, Business and Technical Sessions at DAC

FREMONT, Calif.--(BUSINESS WIRE)--July 13, 2006--Virage Logic Corporation (Nasdaq:VIRL), a pioneer in Silicon Aware IP(TM) and leading provider of semiconductor intellectual property (IP) platforms, today announced it will feature an extensive program at the 43rd Design Automation Conference (DAC), held July 24-27, 2006, at the Moscone Center in San Francisco, California. Virage Logic will be hosting booth #3111 in the Moscone Center, North Hall.

Virage Logic's DAC program will help attendees learn how to proceed with confidence at the advanced process technologies using the company's integrated IP solutions that address high-performance, low-power, high-density, design-for-yield and manufacturability requirements. Additionally, in support of this year's DAC theme -- Multimedia, Entertainment and Games (MEGa) -- Virage Logic will feature IP solutions that focus on the design challenges and design technology requirements for creating advanced MEGa products.

With the support of its VIP Partners, including leading Design Services companies, Electronic Design Automation (EDA) and Test solutions suppliers, Foundry partners and IP providers, Virage Logic will showcase complementary integrated partner solutions. Visitors to the Virage Logic booth will learn how the company and its partners team to provide mutual customers with high-quality, silicon-proven, integrated solutions that address key requirements and deliver optimum manufacturability and maximum yield for complex System-on-Chip (SoC) designs. Some of the featured VIP Partners include Premier sponsor TSMC; VIP sponsor Chartered Semiconductor Manufacturing; Gold-level sponsors Magma and Synopsys; and Silver-level sponsors CEVA, PDF Solutions and Sequence Design. In addition to demonstrations and presentations, a VIP Lounge martini bar will be co-hosted with VIP sponsor, Chartered, on Monday, July 24, from 5:00 p.m. - 6:00 p.m. during the DAC Happy Hour on the exhibit floor. For a complete listing of Virage Logic DAC activities, VIP Partners, presentation schedules or to schedule a private meeting with our IP experts, visit www.viragelogic.com.

The company's extensive DAC activities will showcase Virage Logic's silicon-proven IP and underscore the company's industry leadership position as a trusted IP partner.

Virage Logic 3rd Annual Analyst Breakfast
Monday, July 24, 2006 -- 7:30 a.m. - 9:00 a.m.
Moscone Center, Room #228

Workshop for Women in EDA -- "Working the 80/20 Rule for Success
-- Focusing in on What Matters"
Monday, July 24, 2006 -- 9:00 a.m. - 12:45 p.m.
Moscone Center, Room #302
Panel Moderator: Sabina Burns, Virage Logic Senior Director of
Corporate Marketing and Communications

FSA Luncheon -- "How Many Engineers Does It Take? The Real Issues
in IP Integration"
Monday, July 24, 2006 -- 11:45 a.m. - 1:30 p.m.
Moscone Center, Room TBD
Panel Participant: Jim Ensell, Virage Logic Senior Vice President
of Marketing and Business Development

Synopsys Partner Suite Demonstration
Monday, July 24, 2006 -- 2:00 p.m. - 3:00 p.m.
Moscone Center, Booth #3773

Virage Logic VIP Lounge Martini Bar
Monday, July 24, 2006 -- 5:00 p.m. - 6:00 p.m.
Moscone Center, Booth #3111

Virage Logic and TSMC -- Cigars & Cognac After Hours Event
Monday, July 24, 2006 -- 10:00 p.m. - midnight
Private Event

DAC Management Day Tracks
Tuesday, July 25, 2006 -- 8:30 a.m. - 6:30 p.m.
Moscone Center, Various Rooms
Organizer: Dr. Yervant Zorian, Virage Logic Vice President and
Chief Scientist

Hands-On Tutorial Session -- "Low-Power Design from a Designer's
Perspective"
Thursday, July 27, 2006 -- 2:00 p.m. - 5:00 p.m.
Moscone Center, Room #309
Co-hosts: Virage Logic, Cadence Design Systems and Sandbridge
Technologies

Virage Logic UMC Booth Presentations
Monday, July 24, 2006 -- 11:30 a.m. - 11:45 a.m.
Tuesday, July 25, 2006 -- 2:45 p.m. - 3:00 p.m.
Wednesday, July 26, 2006 -- 2:00 p.m. - 2:15 p.m.
Moscone Center, Booth #3339

About Virage Logic Corporation

Founded in 1996, Virage Logic Corporation (Nasdaq:VIRL) rapidly established itself as a technology and market leader in providing advanced embedded memory intellectual property (IP) for the design of complex integrated circuits. Now, as the company celebrates its 10th anniversary, it is a global leader in semiconductor IP platforms comprising embedded memories, logic and I/Os and is pioneering the development of a new class of IP called Silicon Aware IP(TM). Silicon Aware IP tightly integrates Physical IP (memory, logic and I/Os) with the embedded test, diagnostic and repair capabilities of Infrastructure IP to help ensure manufacturability and optimized yield at the advanced process nodes. Virage Logic's highly differentiated product portfolio provides higher performance, lower power, higher density and optimal yield to foundries, integrated device manufacturers (IDMs) and fabless customers who develop products for the consumer, communications and networking, hand-held and portable, and computer and graphics markets. The company uses its FirstPass-Silicon(TM) Characterization Lab for certain products to help ensure high-quality, reliable IP across a wide range of foundries and process technologies. The company also prides itself on providing superior customer support and was recently named Customer Service Leader of the Year in the Semiconductor IP Market by Frost & Sullivan. Headquartered in Fremont, California, Virage Logic has R&D, sales and support offices worldwide. For more information, visit www.viragelogic.com.

Safe Harbor Statement under the Private Securities Litigation Reform Act of 1995:

Statements made in this news release, other than statements of historical fact, are forward-looking statements, including, for example, statements relating to industry and company trends, business outlook and products. Forward-looking statements are subject to a number of known and unknown risks and uncertainties, which might cause actual results to differ materially from those expressed or implied by such statements. These risks and uncertainties include Virage Logic's ability to improve its operations; its ability to forecast its business, including its revenue, income and order flow outlook; Virage Logic's ability to execute on its strategy to become a provider of semiconductor IP platforms; Virage Logic's ability to continue to develop new products and maintain and develop new relationships with third-party foundries and integrated device manufacturers; adoption of Virage Logic's technologies by semiconductor companies and increases or fluctuations in the demand for their products; the company's ability to overcome the challenges associated with establishing licensing relationships with semiconductor companies; the company's ability to obtain royalty revenues from customers in addition to license fees, to receive accurate information necessary for calculating royalty revenues and to collect royalty revenues from customers; business and economic conditions generally and in the semiconductor industry in particular; competition in the market for semiconductor IP platforms; and other risks including those described in the company's Annual Report on Form 10-K for the period ended September 30, 2005, and in Virage Logic's other periodic reports filed with the SEC, all of which are available from Virage Logic's website (www.viragelogic.com) or from the SEC's website (www.sec.gov), and in news releases and other communications. Virage Logic disclaims any intention or duty to update any forward-looking statements made in this news release.

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