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Create Efficient Distributed Data Processing Environment for Image Processing Equipment, Image Testers, and Machine Vision Equipment using Various Board Products TOKYO, Nov. 8 /PRNewswire/ -- IPFlex Inc. today announced it will immediately start taking orders for its DAPDNA Ethernet Platform products that enable high performance distributed data processing systems. The DAPDNA Ethernet Platform products leverage the features of the DAPDNA-2* dynamically reconfigurable processor** capable of high-speed, multithreaded processing. Data that previously could only be processed centrally can now be quickly and efficiently processed via a distributed data processing system over an Ethernet network. Currently, the DAPDNA Ethernet Platform is comprised of the DAPDNA-EP100 motherboard and the EP-CLM1 daughterboard featuring a CameraLink interface. With the DAPDNA-EP100 and the EP-CLM1 embedded on the system, developers of image processing equipment, image testers and machine vision equipment can build high-speed and efficient distributed data processing systems. Developers can also combine interface daughterboards other than CamerLink for specific applications with the DAPDNA-EP100 to develop customized distributed data processing systems. IPFlex will also begin accepting orders for the DAPDNA-DBU debugging box for the DAPDNA Ethernet Platform products and DAPDNA evaluation kit series. Testing can be done via USB 2.0/1.1 connection, enabling effective, well-coordinated software and hardware design work. The DAPDNA Ethernet Platform will be demonstrated at Embedded Technology 2005 to be held at Pacifco Yokohama from November 16 to 18. (IPFlex booth # C-48) Background of DAPDNA Ethernet Platform Development Applications involving image processing equipment, image testers, security equipment, or machine vision equipment have primarily been performed by a high-speed central processing unit where all data are collected and processed. In recent years, however, there has been an explosion in data volume as a result of greater market demands, which has led to the emergence of system bottlenecks in data collection and transfer speed. This in turn has led IPFlex to focus on creating a distributed data processing systems in which large volumes of data are processed effectively on terminal ends, including cameras. IPFlex has examined these market needs and has developed the DAPDNA Ethernet Platform products that enable high-speed and efficient distributed processing. High-speed distributed processing systems can be built in which large volumes of data are pre-processed quickly with the DAPDNA-2 dynamically reconfigurable processor at the edge of the network, and only results with greatly reduced volume are sent via Ethernet to the central processing unit. About DAPDNA Ethernet Platform The DAPDNA Ethernet Platform is comprised of the DAPDNA-EP100 motherboard and daughterboards that can interface with external devices. The following are features of the newly available DAPDNA-EP100 and EP-CLM1. DAPDNA-EP100 (motherboard) The DAPDNA-EP100 serves as the primary board of the DAPDNA Ethernet Platform. It features a DAPDNA 2 dynamically reconfigurable processor and micro DIMM socket and supports 10/100 BASE-T Ethernet. The DAPDNA-EP100 is an open architecture board that supports an embedded operating system (axLinux). Users can use commonly available drivers and middleware, increasing software productivity and improving maintainability. EP-CLM1 (daughterboard) The EP-CLM1 is a daughterboard that supports applications with a CameraLink interface. Connected to the DAPDNA-EP100, it enables efficient distributed processing for systems comprised of image processing equipment, image testers, security equipment, or machine vision equipment. The EP-CLM1 will be sold as an optional item. DAPDNA-EP100 Specifications - Processor EP-CLM1 Specifications - On-board devices About the DAPDNA-DBU The DAPDNA-DBU is a debugging box that supports the newly available DAPDNA Ethernet Platform as well as the DAPDNA-EB4 and DAPDNA-EB5 evaluation boards. It is used to conduct system operation verification via USB 2.0/1.1 connection. In the DAPDNA-FW II integrated development environment, the DAPDNA-DBU can be used to debug in parallel with application development. This kit enables well-coordinated software and hardware design work, leading to significant reductions in system development time. DAPDNA-DBU Specifications - Interface About the DAPDNA-2 Dynamically Reconfigurable Processor DAPDNA-2 is a dual-core processor, comprised of a high-performance RISC processor core, called the DAP, and the dynamically reconfigurable core, DNA, a two-dimensional array of 376 processing elements(PEs). DAPDNA-2 can change its hardware configuration to provide the optimal circuitry for an application on demand. This configuration change can take place not only when the system is designed, but also during operation, dynamically, in a single clock cycle***, to meet the instantaneous change in needs of applications implemented by the system. Terminology About IPFlex IPFlex Inc. is a fabless semiconductor company established in March 2000. IPFlex supplies high performance, multifunctional processors that are dynamically reconfigurable, and also provides development software, evaluation boards, and peripheral interface products for the processors. With its DAPDNA-2 dynamically reconfigurable processors and Software to Silicon(R)- based DAPDNA-FW II Integrated Development Environment software, IPFlex provides solutions to shorten development cycle and to respond quickly to the changes in applications. Information contained in press releases is up-to-date as of the date of release. Please note that, as such, it is subject to change without prior notice. Source: IPFlex Inc. Web site: http://www.ipflex.com/
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