MIPS Moves on Platforms
Much More than Cores

It sounds like the ideal business model.  Design yourself a capable processor, implement it as an ASIC core, talk a few manufacturers of high-volume products into using it in their system-on-chip (SoC) design, and voila! You get a chunk of revenue from every copy of the resulting set-top-box, smart phone, digital camera or embedded-system super-widget that goes out the door.  Once you’ve got everything up and running smoothly, you just sit back and watch while the royalty revenues pour in.

Of course, reality is not quite so beautiful.  In any gravy-train business model, there will soon be competitors.  That competition will force you to up your game to stay ahead.  They will try to help the customer more than you do to capture that socket and the revenue that follows it.  In the case of processor cores, that means moving beyond the core itself.  Processor IP companies like MIPS and ARM are constantly moving farther and farther beyond the core to deliver a comprehensive set of tools and peripherals that form a platform which can be integrated into a variety of system designs with an absolute minimum of effort.  They look at all aspects of the integration process, including the design of the hardware platform itself, verification of the ASIC that contains it, training of the development engineers in the vagaries of the platform, software development and debug, porting of legacy IP into a new design – the list goes on and on.

Recently, MIPS has been on a rampage as they expand their offerings far beyond the simple licensing of processor core IP.  Last week, MIPS announced a licensing agreement with Open-Silicon for their MIPS32 24Kc Pro processor core to be included in Open-Silicon’s SoC deployment platform.  At the same time, Open-Silicon licensed a 90nm core-optimized IP kit that was developed by MIPS and Virage Logic.  What’s new in this arrangement is the business model – putting another layer of value-added between the IP suppliers and the SoC designer.  Open-Silicon will do the integration and proving of the whole combination of IP and tools that make up the platform, then will license that to SoC design teams.  This should lower the bar on the expertise and resources required to complete a complex SoC using the popular MIPS processor core, and it should open those capabilities up to a much broader market.

Even though embedded processor cores like those offered by MIPS are ubiquitous in consumer electronics products these days, the barriers for entry into that design space are still extremely high, and the club of companies that can successfully complete an SoC using one is exclusive indeed.  Every step down the path of standardizing the platform, pre-verifying IP and process interactions, and providing more powerful, easier to use tools for system design and integration makes the potential market broader and the number of companies that can play the game larger.

This week, MIPS followed on to last week’s announcement with a pair of announcements from their FS2 division (a division born of their acquisition of First Silicon Solutions about a year ago).  FS2 has now integrated with the increasingly popular Eclipse IDE, allowing customers to use a familiar open-source software development environment and simultaneously allowing MIPS/FS2 to focus development efforts on their primary area of expertise – enabling embedded debug, rather than spending development resources on creating and maintaining yet another undifferentiated generic software IDE.

“We’re seeing Eclipse show up at more and more customer accounts,” says Rick Leatherman, vice president and general manager of MIPS FS2 division.  “We wanted to take advantage of the flexibility of the Eclipse environment and extend it to allow control of our system-level debug capabilities.”  The new Eclipse-based Navigator IDE for MIPS-Based software development does just that, providing an integrated system that folds into MIPS’s recently announced “SOC-it” platform. 

In addition to simplifying the usage model, FS2 took a look at the entire user experience, bringing substantial value into issues like installation as well.   “In our integration, we worked to simplify the installation process,” Leatherman continues, “turning what is typically a complex, multi-hour process into a push-button, 15 minute exercise.”

FS2’s environment centers around a JTAG-based probe called the “System Navigator Probe” that provides a physical link to the target system.  The probe streams data and control between the physical device and the System Navigator IDE, completing the embedded remote debug chain.  In addition to debug features like EJTAB and PDtrace that apply directly to the MIPS cores, FS2 also provides debug IP that facilitates system-wide capabilities like bus analysis and multi-core debug.

Continuing the trend of broad-based full-platform development, MIPS/FS2 also just announced support for ThreadX kernel-aware debug, providing a plug-in to the Eclipse-based Navigator IDE that gives greater visibility into ThreadX at the thread and task level.  It gives on-demand views of ThreadX data structures such as threads, queues, semaphores, and other objects, making information about those objects available during debug.

The embedded development space is a complex, multi-dimensional matrix of sometimes-compatible components like processor cores, bus structures, peripherals, memory architectures, operating systems, development tools, debuggers, and so forth.  For a design team embarking on an SoC design, just picking a combination of all of those elements that is compatible, tested and verified together can be a significant challenge.  By spreading their wings into the full-platform space as MIPS is beginning to do, IP vendors can simplify that process for their customers, shorten their design processes, reduce the expertise required to get a system up and running, and improve the reliability of the finished system by taking advantage of previous verification efforts.

As this trend continues, as in other markets, we will probably start to see an increase in even more application-specific platforms as well, augmenting offerings like these with additional pre-verified IP collections, reference designs for hardware and software, and application-specific tools to speed up the whole process for design teams working in targeted areas.  We will also probably continue to see an increase in the number of layers in the supply chain as more vendors find ways to add value to the process by partnering with existing suppliers and integrating and verifying components from multiple vendors into ready-to-roll development platforms.

Kevin Morris, Embedded Technology Journal

November 28, 2006

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