ESL for FPGAs
Tools Make FPGA Design an Exercise in
Software Programming

A fundamental change is taking place in the world of logic design. A new generation of design tools is empowering designers to take their algorithmic expressions straight into hardware without having to learn traditional hardware design techniques. These tools and associated design methodologies are classified collectively as electronic system level (ESL) design. A generally accepted characterization of ESL is that it refers to tools that enable the design process to begin at a higher level of abstraction than the current mainstream register transfer level (RTL). ESL design languages, also referred to as High Level Languages (HLLs), are closer in syntax and semantics to the popular ANSI C than to hardware languages like Verilog and VHDL. Xilinx defines the ESL for FPGA platform as the collection of ESL design methodologies that are specifically optimized for an FPGA platform.

ESL Relevance to FPGA Design

While ASIC design flows have dominated the early evolution of ESL tools, an increasing number of ESL tool providers are now focusing on providing specialized solutions for programmable logic. ESL flows complement the current mainstream RTL-based flows and are a natural evolution for FPGA design tools. [Fig. 1] These tools allow for the flexibility of programmable hardware to be more easily accessed by a wider and more software-centric user base.

Fig 1. ESL methodologies complement the mainstream RTL flows

Consider the following scenarios in which ESL and programmable hardware can provide a highly differentiated value to prospective designers:

1. A large number of design algorithms are often times captured in a high-level language like “C” and must be converted into a corresponding RTL description. The process of manually converting the C code base to an equivalent RTL can be tedious and error prone. The process must be repeated anytime the original algorithm undergoes modification and change. ESL tools help manage this complexity by enabling a more direct C-to- hardware implementation path. With HLL compilers now capable of invoking advanced synthesis techniques, the quality of synthesized circuits is fast approaching the quality of results obtained using hand coded RTL. This combined with the ease of use associated with capturing designs at higher levels of abstraction provides designers with a simpler and more manageable methodology that delivers a significant productivity advantage.

2. ESL tools and programmable hardware together enable a desktop-based development environment that makes it possible for software algorithms to be implemented in programmable hardware just as easily as they are currently implemented in a microprocessor [Fig 2]. The ESL tools abstract away the low-level hardware implementation details by removing the need to learn Verilog and VHDL as well as by providing a tight interface to FPGA-based evaluation boards. Further, most ESL vendors now provide board-specific reference applications to help developers get started. These are written in high-level languages that make the creation of customized, hardware-accelerated systems much faster and easier for even first-time users. In the instance when the processor is embedded inside the FPGA, ESL tools add additional value by automatically inferring hardware structures like memories from the original C code and by generating the required processor – peripheral interface circuitry and the corresponding software device drivers that enable communication between the embedded processor and the hardware accelerator block. This methodology allows designers to easily explore acceleration strategies using programmable hardware over the traditional processor centric implementation. When compared to code running on a CPU, FPGA-accelerated code can run orders of magnitude faster while consuming significantly less power.

Fig 2. ESL and FPGAs enable a unique desktop based development environment that makes possible new design paradigms

ESL’s Target Audience

ESL flows offer prospective FPGA users with value in the form of increased productivity and accelerated performance. Working at a higher level of abstraction allows designers with skills in traditional software programming languages like C to more quickly explore their ideas in hardware. Typical applications that are suitable for ESL methodologies include algorithms that are computationally intensive and with extensive inner-loop constructs. Compute- intensive nested loops can realize tremendous acceleration through the concurrent parallel execution conveniently possible in programmable hardware. Some of the areas where ESL methods have been successfully applied include applications in audio/video/image processing, security and encryption, high-speed signal and packet processing, bioinformatics, geophysics and astrophysics among others.

The interesting and revolutionary attribute of ESL is that its value and appeal extends to both hardware designers and software programmers.

To the hardware designer, ESL offers a more efficient methodology to manage design complexity. By working at a more abstract level, designers can express their intent using fewer keystrokes and writing fewer lines of code. This typically means a much faster time to design completion, and less chance of making errors that require tedious, low-level debugging. Furthermore, managing design changes in HLLs is far easier to maintain than with corresponding HDLs. Hardware engineers do share a concern about the quality of HLL synthesis. However, with the rapid improvement in high level language synthesis technology, the gap between HDL and HLL synthesis has narrowed to the point that designers are willing to trade-off slight performance penalty in favor of improved time to market. The hardware designers represent the majority of today’s early adopters of ESL tools.

To the software programmers, ESL offers the benefits of a parallel hardware implementation and through it, a substantial acceleration of the target application when compared to a CPU-only implementation. The tools abstract the need for programmers to learn traditional hardware design methodologies. In most instances, users can implement an entire design in hardware without the assistance of an experienced hardware designer. Software-centric application and algorithm developers who have successfully applied the benefits of this methodology to FPGAs include systems engineers, scientists, mathematicians, and embedded and firmware developers. This is where ESL has great potential to open up huge markets for programmable logic.

ESL for FPGAs Needs To Build Momentum

As with any new and emerging concept, early customer traction remains a key challenge for providers of ESL tools. Among the factors that have contributed to a slow start for ESL and FPGAs has been a general lack of awareness among the user community as to what is possible with ESL and what commercial solutions currently exist. Other challenges include user apprehension and concerns over the quality of results and learning curve associated with investing in proprietary ESL methodologies.

The launch of the Xilinx ESL Initiative in March 2006, a collaborative effort aimed at promoting ESL methodologies for FPGAs, has taken the first concrete step in establishing a clear identity and common platform for ESL technologies that are relevant to the programmable systems industry. The collective ecosystem of Xilinx ESL partners offers a wide spectrum of complementary solutions which are optimized for a range of applications, platforms and end users [Fig 3]. The overall goal of the ecosystem-driven initiative is to help accelerate the pace of ESL innovation for FPGAs and to bring the benefits of programmable logic to a wider and more software-centric user base. Participating ESL vendors share a common commitment to support FPGAs and collaborate to expand the markets for ESL tools.
In order to achieve its objective, the Initiative is focused in two main areas:

1. Engineering collaboration to further increase the value of ESL product offerings. This will include working together to improve HLL compiler quality of results as well as to enhance ease of use through greater tool interoperability and use of standards and APIs. The clear intent is to accelerate the pace of maturation of the technology so as to bring it to the mainstream sooner.

2. ESL awareness and evangelization of the value, relevance and benefits of ESL methodologies to current and prospective FPGA users. The program will seek to inform and educate users on the types of ESL solutions that currently exist and how the various offerings can provide better approaches to solving existing problems. The aim is to empower users to make informed decisions on the suitability and fit of various ESL offerings to their specific application needs. Greater awareness will lead to increased useradoption, which in turn will contribute to the development of a sustainable ESL for FPGA ecosystem.
Even though ESL is undergoing rapid technical innovation, it is important to realize the substantial practical value of what is already available today. Designers can access this information by visiting the ESL knowledge center at www.xilinx.com/esl and participate in discussions on related topics at the new ESL for FPGA online forum at http://toolbox.xilinx.com/cgi-bin/forum.

Fig 3: Xilinx ESL partner offerings target a wide spectrum of use models

Conclusion

Although paradigm shifts such as those introduced by ESL will take time to become fully accepted within the mainstream design communities, ESL technologies are starting to change the way hardware and software designers create, optimize, and verify complex electronic systems. ESL tools essentially allow software-centric algorithm developers to target programmable hardware without having to learn low-level details associated with hardware design. Today, designers can select from a rich and wide spectrum of innovative and productivity-enhancing ESL solutions that have been specifically optimized for FPGAs. Xilinx and its ESL Initiative partners are serving as a major catalyst for change taking place in the space of electronic design. Stay tuned for continuing updates and new developments.

by Milan Saini, Xilinx Inc.

August 22, 2006

About the Author: Milan Saini is a Senior Marketing Manager at Xilinx, Inc. His current responsibilities include defining and driving Xilinx' overall Electronic System Level (ESL) design strategy. Prior to this, Milan was principally responsible for developing the tool partner ecosystem for Xilinx' embedded processing platform. Milan has been with Xilinx since 1993 and during this tenure has held various positions in the engineering, applications and marketing organizations. Milan holds an MSEE from University of Oklahoma and a BSEE from Panjab University, India.

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